Chapter 4: BIOS
4-15
Adjacent Cache Line Prefetch (Available when supported by the
CPU.)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and Enabled.
Hardware Prefetch (Available when supported by the CPU.)
Set to this option to enabled to enable the hardware components that are used in
conjunction with software programs to prefetch data in order to shorten execution
cycles and maximize data processing effi ciency. The options are Disabled and
Enabled.
Direct Cache Access (Available when supported by the CPU.)
Set to Enable to route inbound network IO traffi c directly into processor caches to
reduce memory latency and improve network performance. The options are Disabled
and Enabled. If this item is set to Enabled, the following item will display.
DCA Delay Clocks (Available when supported by the CPU.)
This feature allows the user to set the clock delay setting from snoop to prefetch
for Direct Cache Access. Select a setting from 8 (bus cycles) to 120 (bus cycles)
(in 8-cycle increment). The default setting is 32 (bus cycles).
Intel <R> Virtualization Technology (Available when supported by
the CPU.)
Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creating
multiple "virtual" systems in one physical computer. The options are Enabled and
Disabled. (Note: If there is any change to this setting, you will need to power off
and restart the system for the change to take effect.) Please refer to Intel’s web
site for detailed information.
Intel EIST Support (Available when supported by the CPU.)
Select Enabled to use the Enhanced Intel SpeedStep Technology and allows the
system to automatically adjust processor voltage and core frequency in an effort
to reduce power consumption and heat dissipation. The options are Enabled (C
States & GV1/GV3 are enabled), GV1/GV3 (GV1/GV3 are enabled, but C States
are disabled.), C States Only (GV1/GV3 are disabled, but C States are enabled.),
and Disabled (C States & GV1/GV3 are disabled). Please refer to Intel’s web
site for detailed information.
